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PI74FCT273T
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
Fast CMOS Octal D Flip-Flop with Master Reset
Features
* Pin compatible with bipolar FASTTM Series at a higher speed and lower power consumption * TTL input and output levels * Low ground bounce outputs * Extremely low static power * Hysteresis on all inputs * Industrial operating temperature range: -40C to +85C * Packaging: - 20-pin 173-mil wide plastic TSSOP (L) - 20-pin 150-mil wide plastic QSOP (Q) - 20-pin 300-mil wide plastic SOIC (S)
Description
Pericom Semiconductor's PI74FCT273T is a 8-bit wide octal designed with eight edge-triggered D-type flip-flops with individual D inputs and O outputs. The common buffered Clock (CP) and Master Reset (MR) load and resets (clear) all flip-flops simultaneously. The register is fully edge-triggered. The D input state, one setup time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop's O output. All outputs will be forced LOW independently of Clock or Data inputs by a LOW voltage level on the MR input. Device models available upon request.
Block Diagram
D0 CP D CP RD Q D CP RD Q D CP RD Q D CP RD Q D CP RD Q D CP RD Q D CP RD Q D CP RD Q D1 D2 D3 D4 D5 D6 D7
MR O0 O1 O2 O3 O4 O5 O6 O7
Pin Configuration
MR O0 D0 D1 O1 O2 D2 D3 O3 GND
1 20 2 19 3 18 20-Pin 4 17 L20 5 16 Q20 6 15 S20 7 14 8 13 9 12 10 11
Pin Description
Vcc O7 D7 D6 O6 O5 D5 D4 O4 CP
Truth Table(1)
Mode MR Reset (Clear) L Load "1" H Load "0" H Inputs CP X DN X h l Outputs ON L H L
Pin Name MR CP D0-D7 O0-O7 GND VCC
Description Master Reset (Active LOW) Clock Pulse Input (Active Rising Edge) Data Inputs Data Outputs Ground Power
1. H = High Voltage Level h = High Voltage Level one setup time prior to the LOW-to-HIGH Clock transition L = Low Voltage Level l = LOW Voltage Level one setup time prior to the LOW-to-HIGH Clock Transition X = Don't Care = LOW-to-HIGH Clock Transition
1
PS2013B
10/07/04
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT273T Octal D Flip-Flop with Master Reset
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ............................................................ -65C to +150C Ambient Temperature with Power Applied ............................ -40C to +85C Supply Voltage to Ground Potential (Inputs & Vcc Only) ..... -0.5V to +7.0V Supply Voltage to Ground Potential (Outputs & D/O Only) .. -0.5V to +7.0V DC Input Voltage .................................................................... -0.5V to +7.0V DC Output Current .............................................................................. 120 mA Power Dissipation .....................................................................................0.5W
Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
DC Electrical Characteristics (Over the Operating Range, TA = -40C to +85C, VCC = 5.0V 5%)
Parameters Description VOH VOL VOL VIH VIL IIH IIL IOZH IOZL VIK IOFF IOS VH Output LOW Current Output LOW Current Input HIGH Voltage Input LOW Voltage Input HIGH Current Input LOW Current High Impedance Output Current Clamp Diode Voltage Power Down Disable Short Circuit Current Input Hysteresis VCC = Min., IIN = -18mA VCC = GND, VOUT = 4.5V VCC = Max.(3), VOUT = GND -- -60 Test Conditions(1) IOH = -15.0mA IOL = 64mA IOL = 12mA (25 Series) 2.0 0.8 VIN = VCC VIN = GND VOUT = 2.7V VOUT = 0.5V -0.7 -- -120 200 1 -1 1 -1 -1.2 100 VCC = Min., VIN = VIH or VIL VCC = Min., VIN = VIH or VIL Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VCC = Max. VCC = MAX. Min. Typ(2) Max. Units 2.4 3.0 0.3 0.3 0.55 0.50 V V V V V A A A A V A mA mV Output HIGH Voltage VCC = Min., VIN = VIH or VIL
Capacitance (TA = 25C, f = 1 MHz)
Parameters(4) CIN COUT Description Input Capacitance Output Capacitance Test Conditions VIN = 0V VOUT = 0V Typ 6 8 Max. 10 12 Units pF pF
Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5.0V, +25C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. This parameter is determined by device characterization but is not production tested.
2
PS2013B
10/07/04
PI74FCT273T Octal D Flip-Flop with Master Reset
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
Power Supply Characteristics
Parameters Description ICC ICC ICCD Quiescent Power Supply Current Supply Current per per Input @ TTL HIGH Supply Current per Input per MHx(4) Total Power Supply Current(6) VCC = Max. VCC = Max. Test Conditions(1) VIN = GND or VCC VIN = 3.4V(3) Min. Typ(2) 0.1 0.5 0.15 Max. 500 2.0 0.25 Units A mA mA/ MHz mA
VCC = Max., Outputs Open VIN = VCC MR = Vcc, One Input Toggling VIN = GND 50% Duty Cycle VCC = Max., Outputs Open fCP = 10 MHZ, 50% Duty Cycle MR = Vcc, 50% Duty Cycle One Bit toggling at fI = 5 MHZ VCC = Max., Outputs Open fCP = 10 MHZ, 50% Duty Cycle MR = VCC, 50% Duty Cycle Eight Bits toggling at fI = 2.5 MHZ, 50% Duty Cycle VIN = VCC VIN = GND VIN = 3.4V VIN = GND VIN = VCC VIN = GND VIN = 3.4V VIN = GND
IC
1.5 2.0 3.8
3.5(5) 3.5(5) 7.3(5)
6.0
16.3(5)
Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device. 2. Typical values are at Vcc = 5.0V, +25C ambient. 3. Per TTL driven input (VIN = 3.4V); all other inputs at Vcc or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested. 6. IC =IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCP/2 + fINI) ICC = Quiescent Current ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fI = Input Frequency NI = Number of Inputs at fI All currents are in milliamps and all frequencies are in megahertz.
3
PS2013B
10/07/04
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT273T Octal D Flip-Flop with Master Reset
Switching Characteristics over Operating Range
273T/2273T Com. 273AT/2273AT Com. Max Min Max Min 273CT/2273CT Com. Max Unit
Parameters tPLH tPHL tPHL tPLH tSU tH tw tW tREM
Description Propagation Delay CP to ON Propagation Delay MR to ON Setup Time, HIGH or LOW Dn to CP Hold Time, HIGH or LOW Dn to CP CP Pulse Width(3) HIGHorLOW MR Pulse Width(3) LOW Recovery Time MR to CP (3)
Conditions(1) CL = 50pF RL = 500
Min
2.0 2.0 3.0 2.0 7.0 7.0 4.0
13.0 13.0 -- -- -- -- --
2.0 2.0 2.0 1.5 6.0 6.0 2.0
7.2 7.2 -- -- -- -- --
2.0 2.0 2.0 1.5 6.0 6.0 2.0
5.8 6.1 -- -- -- -- --
ns ns ns ns ns ns ns
Notes: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. This parameter guaranteed but not production tested.
Packaging Mechanical: 20-pin SOIC (S)
20
.2914 .2992
7.40 7.60 .010 .029 0.254 x 45 0.737
1 .496 12.60 .511 12.99 .0091 .0125 0.41 .016 1.27 .050 .0926 .1043 2.35 2.65 SEATING PLANE .394 .419 10.00 10.65 0.23 0.32
0-8
.020 0.508 REF .030 0.762
.050 BSC 1.27
.013 .020 0.33 0.51
.0040 .0118
0.10 0.30 X.XX DENOTES CONTROLLING X.XX DIMENSIONS IN MILLIMETERS
4
PS2013B
10/07/04
PI74FCT273T Octal D Flip-Flop with Master Reset
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
Packaging Mechanical: 20-Pin TSSOP (L)
20
.169 .177
4.3 4.5
1 .252 .260 6.4 6.6 .004 0.09 .008 0.20 .047 1.20 Max 0.45 0.75 .018 .030
SEATING PLANE
.238 .269 6.1 6.7
.0256 BSC 0.65
.007 .012 0.19 0.30
.002 0.05 .006 0.15
X.XX X.XX
DENOTES CONTROLLING DIMENSIONS IN MILLIMETERS
Packaging Mechanical: 20-pin QSOP (Q)
20
.008 0.20 MIN.
.150 .157
3.81 3.99
Guage Plane
.008 .013 0.20 0.33
.010 0.254
1 .337 8.56 .344 8.74
Detail A
.016 .035 0.41 0.89
.041 1.04 REF
0-6
.058 REF 1.47
.053 1.35 .069 1.75 SEATING PLANE
.015 x 45 0.38
Detail A
.007 .010 .016 .050 0.41 1.27
0.178 0.254
.025 BSC 0.635
.004 0.101 .010 0.254 .008 0.203 .012 0.305
.228 .244 5.79 6.19
X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS
5
PS2013B
10/07/04
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT273T Octal D Flip-Flop with Master Reset
Ordering Information
Ordering Code PI74FCT273TQ PI74FCT273TS PI74FCT273ATL PI74FCT273ATS PI74FCT273ATQ PI74FCT273CTL PI74FCT273CTS PI74FCT273CTQ Package Code Q S L S Q L S Q Speed Grade Blank Blank A A A C C C Package Type 20-pin QSOP 20-pin SOIC 20-pin TSSOP 20-pin SOIC 20-pin QSOP 20-pin TSSOP 20-pin SOIC 20-pin QSOP
Notes: 1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/
Pericom Semiconductor Corporation * 1-800-435-2336 * www.pericom.com
6
PS2013B 10/07/04

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